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Refreshing a Computer Chip to a “Chiplet”

Pitt & Notre Dame land $2 million for first Design for Environmental Sustainability in Computing award from NSF

For the average consumer, the life cycle of a computer starts when the system is unboxed and plugged in and ends when it is time for an upgrade. However, a computer’s true life cycle begins from the original design, to the mining of elements needed for complex circuitry, through its use, recycling, and ultimate disposal. Indeed, it is estimated that that the total energy consumed and green house gases emitted to manufacture and distribute computers exceeds their operational use. 

The National Science Foundation Directorate for Computer and Information Science and Engineering this year committed to identifying research that would radically transform the environmental sustainability of computing. Researchers from the University of Pittsburgh and University of Notre Dame are among the first teams to lead this effort with a four-year, $2 million award. Leveraging the complementary expertise from the team members on FPGA design, tinyML and on-device AI, the research is set to map the uncharted territory of reusing decommissioned FPGAs for greater sustainability in the semiconductor industry.

“Computer technology is as ubiquitous in modern society as electricity, but in recent years there has been growing concern to develop more sustainable computing that reduces the environmental impact of manufacturing and the production of e-waste, while improving performance and extending lifespans,” explained Peipei Zhou, assistant professor of electrical and computer engineering at Pitt’s Swanson School of Engineering and lead investigator. “Our particular focus is to take a specific integrated chip called a field-programmable gate array (FPGA) and “refresh” it for secondary and tertiary deployments to amortize manufacturing investment." 


(Above: 3D Illustration Chiplet Multi-Chip Module (MCM) Technology/Pete Hansen-Shutterstock)

In this use, Zhou’s team coins REFRESH as “Revisiting Expanding FPGA Real-estate for Environmentally Sustainability Heterogeneous-Systems” to create these new “chiplets.” Her collaborators include Jingtong Hu, associate professor of electrical and computer engineering at the Swanson School; and Yiyu Shi, professor of computer science and engineering at Notre Dame. 

According to the NSF, the Design for Environmental Sustainability in Computing (DESC) program “aims to address the substantial environmental impacts that computing has through its entire lifecycle—from design and manufacturing, through deployment into operation, and finally into reuse, recycling, and disposal.” Margaret Martonosi, NSF CISE leader, also highlighted the award in her keynote address at the prominent International Symposium on Computer Architecture this past June. 

“The DESC program demonstrates our clear commitment to advancing US national priorities,” Dr. Martonosi said in the announcement. “By promoting research and development that integrates environmental considerations into computing we are addressing critical environmental challenges and contributing to a sustainable future. As we continue to navigate an era of rapid technological advancement and environmental concerns, programs like DESC play a pivotal role in shaping the future of our nation and our planet.”

Zhou explained that FPGAs are integrated circuits suitable for reuse in new products as a chiplet, with fewer produced carbon emissions and expanded use. The first thrust of their research will focus on developing a refreshed architecture and design for the chip, followed by analyzing and prototyping the hardware to select the optimal new design based on the chip age. 

“Most people probably don’t realize that modern computer circuitry can have a second life, but until now the cost was prohibitive,” Hu added. “However, with advances in technology and the growing need to find ways to reuse rare earth metals, we can create a longer lifecycle for these chips.” 

Thrust 3 of the project is dedicated to developing a system-in-a-package sustainability process to accurately model and assess the environmental impacts including fabrication, integration, and packaging. The final thrust will investigate the most effective methodologies for accelerating a wide range of REFRESH FPGA applications from machine learning to genomics. Education and outreach programs will also be developed for K-12 students to participate. 

“For decades, computers design advanced so quickly that what once occupied a large room now fits in the palm of our hands,” Shi noted. “However, we have reached a critical point in time when we need to change the computer lifecycle from a straight line to a closed circle to address sustainability and negative environmental impact. Refreshed chiplets will be one of the significant advances to make this happen.” 


The work was supported by funds from the US Department of Energy, Office of Science, Basic Energy Sciences under grant number DE-FG02-90ER45438. The University of Pittsburgh Center for Research Computing provided computational facilities.